1. Field of the Invention
The invention relates to automatic test equipment (ATE) for printed circuit card assemblies particularly with respect to systems utilizing bed-of-nails fixturization.
2. Description of the Prior Art
Automatic test equipment utilizing bed-of-nails fixturization for testing printed circuit card assemblies are well known in the prior art. In such systems the printed circuit card is inserted into a fixture having a plurality of test probes or "nails" adapted to contact the electrical nodes of the card from the solder side thereof. The plurality of test probes resemble a "bed of nails". The fixture includes a vacuum port utilized to create a vacuum between the card and the probes so as to urge the card into effective electrical contact with the probes. Such test systems typically utilize one probe for each node of the printed circuit card under test. The system also conventionally includes one driver/sensor for each probe. The driver stimulates a probe with test signals and the sensor senses the response of the node contacted by the probe. In this manner the various components on the card can be tested by the test programs incorporated in the ATE. The test programs apply appropriate stimulation via the drivers and examine the appropriate outputs via the sensors.
In this manner the system automatically detects faults on the card and identifies the suspected faulty components and further identifies the pins of the components that may be involved in the faults. Conventionally, in the process of isolating a fault, the existance of continuity between the pins of a suspected component and the system driver/sensors is first verified. If such continuity is detected, the component is declared by the system to contain a fault and appropriate action is effected. In such ATE systems, the continuity test is performed with a hand-held probe coupled to the system. The probe is utilized to sequentially contact, from the component side of the card, each of the pins of the suspected component while the system, via the bed-of-nails probes, performs the continuity test. If an open is detected between the test system and the suspected component on the card, the component is considered to be good and appropriate further action is taken. Before a defective component is replaced, involving expensive card rework, the continuity test is utilized to guarantee that the suspected component is, in fact, defective.
This continuity verification test is effectively utilized with all types of components having pins that are physically accessible to the probe on the component side of the card. Such components include discrete elements such as resistors, capacitors, and the like as well as dual-in-line (DIP) packages having pin shoulders on the accessible side of the card.
Present day printed circuit card assemblies utilize large numbers of pin-grid or gate arrays (PGA). The pins of the PGA package emanate from the bottom thereof and thus accessibility to the pins of a PGA from the component side of the card by the hand held continuity probe is practically impossible. In the absence of performing the continuity test on a suspected PGA, the procedure utilized may be simply to replace the component. For a significant number of detected PGA faults, the problem may be lack of continuity with the test system rather than a faulty component. Present day PGA's are expensive ($100-$400) and there are many such components (40 or so) on each card. Thus, replacement of nonfaulty PGA's involves a significant expense not only in the cost of the devices themselves but in the time and labor expended in performing the replacements in addition to the various product reliability problems that are often associated with rework.
As an alternative to replacing the suspected PGA, the card may be removed from the fixture and a portable continuity tester, such as an ohmeter, utilized to trace the continuity of the networks with which the suspected PGA is associated. Since the card has been removed from the fixture, contact with the solder side thereof may be effected. This approach is undesirable because it involves a lengthy manual intervention in an otherwise rapid automatic test process. This is appreciated since present day PGA packages include between 70 to 250 pins that connect to a like number of networks on the card.
Another prior art solution of the problem is the utilization of a separate test system that semiautomatically meters the networks of a card that failed the ATE test. Utilization of such systems require removing the card from the ATE fixture, taking the card to the secondary system, inserting the card into the secondary system, and performing the test thereon This procedure considerably extends the testing time required for the card. Such ancillary systems add excessive cost to the card testing process particularly considering the fixturization to adapt the ancillary system to the numerous cards to be tested.